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  • LVDS technical principle and detailed introduction

    Category:Company news     Source:Hongjia United    Views:2475    Date:2016/1/5

    Through the development of Shenzhen Hongjia technology R & D department, our company has mastered the mature LVDS LCD technology. At present, there are 7-inch LVDS screens with a resolution of 1024 * 600 in mass production. It is mainly used in industrial control and industry customized customer base.
    LVDS technical principle and detailed introduction
    With the increasing popularity of the Internet, a variety of communication devices are increasingly welcomed by consumers, resulting in a sharp increase in the demand for data transmission. In addition, digital TV, high-resolution TV and color image all need higher bandwidth. Therefore, system design engineers must rely on analog technology to design circuit system and support data transmission. Low voltage differential signal transmission technology (LVDS) is such an analog technology. Engineers can use this technology to design mixed signal systems. LVDS adopts high-speed analog circuit technology to ensure that copper wires can support data transmission of more than Gigabit.
    1. Introduction to LVDS
    LVDS (low voltage differential signaling) is a low swing differential signal technology, which enables the signal to be transmitted at the rate of hundreds of Mbps on the differential PCB line pair or balance cable. Its low voltage amplitude and low current drive output realize low noise and low power consumption.
    For decades, the use of 5V power supply has simplified the interface between different technologies and manufacturers' logic circuits. However, with the development of integrated circuits and the demand for higher data rate, low-voltage power supply has become an urgent need. Reducing the supply voltage not only reduces the power consumption of high-density integrated circuits, but also reduces the heat dissipation inside the chip, which helps to improve the integration.
    The LVDS receiver can withstand a voltage change of at least ± 1V between the driver and the receiver. Since the typical bias voltage of LVDS driver is + 1.2V, the sum of voltage change to ground, driver bias voltage and slightly coupled noise is the common mode voltage at the input end of the receiver relative to the ground of the receiver. The common mode range is + 0.2V to + 2.2V. It is suggested that the input voltage range of the receiver is 0V ~ + 2.4V.
    2 design of LVDS system
    The design of LVDS system requires that the designer should have experience in ultra-high speed single board design and understand the theory of differential signal. It is not very difficult to design a high-speed differential board. The following will briefly introduce the points needing attention.
    2.1 PCB board
    (A) At least 4 layers of PCB board (from top to bottom): LVDS signal layer, layer, power layer and TTL signal layer;
    (B) Isolate TTL signal and LVDS signal from each other, otherwise TTL may be coupled to LVDS line. It is best to place TTL and LVDS signals on different layers isolated by power supply / stratum;
    (C) Make the LVDS driver and receiver as close to the LVDS end of the connector as possible;
    (D) The distributed multiple capacitors are used to bypass the LVDS equipment, and the surface mount capacitors are placed close to the power supply / formation pins;
    (E) Thick wires shall be used for power supply layer and stratum, and 50 Ω wiring rules shall not be used;
    (F) Keep the return path of PCB ground layer wide and short;
    (G) Cables using gu9around return wire should be used to connect the strata of the two systems;
    (H) Using multiple vias (at least two) connected to the power layer (line) and the layer (line), the surface mount capacitor can be directly welded to the via pad to reduce the wire head.
    2.2 on board conductor
    (A) Microwave transmission line (microtrip) and stripline (stripline) have good performance;
    (B) Advantages of microwave transmission line: generally, it has higher differential impedance and does not need additional vias;
    (C) Striplines provide better shielding between signals.
    2.3 differential line


    (A) Using a controlled impedance line matched with the differential impedance and terminal resistance of the transmission medium, and making the differential line pairs as close to each other as possible immediately after leaving the integrated chip (the distance is less than 10mm), which can reduce reflection and ensure that the coupled noise is common mode noise;
    (B) Match the lengths of the differential line pairs to reduce signal distortion and prevent electromagnetic radiation caused by phase difference between signals;
    (C) Do not rely only on the automatic wiring function, but should be carefully modified to achieve differential impedance matching and differential line isolation;
    (D) Minimize vias and other factors that may cause line discontinuities;
    (E) Avoid 90 ° routing that will cause discontinuity of resistance value, and use arc or 45 ° broken line instead;
    (F) In the differential line pair, the distance between the two lines shall be as short as possible to maintain the common mode suppression capability of the receiver. On the printed board, the distance between the two differential lines shall be as consistent as possible to avoid the discontinuity of differential impedance.
    2.4 terminals
    (A) The terminal resistance is used to realize the maximum matching of the differential transmission line. The resistance value is generally between 90 ~ 130 Ω, and the system can also be used
    This terminal resistance is required to generate a differential voltage for normal operation;
    (B) It is best to use a surface mount resistor with an accuracy of 1 ~ 2% to jumper on the differential line. If necessary, two resistors can also be used, each of which is
    50 Ω resistance and grounded through a capacitor in the middle to filter out common mode noise.
    2.5 unused pins
    All unused LVDS receiver input pins are suspended, all unused LVDS and TTL output pins are suspended, and the unused TTL transmit / driver input and control / enable pins are connected to power or ground.
    2.6 medium (cable and connector) selection
    (A) Using controlled impedance medium, the differential impedance is about 100 Ω, and large impedance discontinuity will not be introduced;
    (B) Balanced cables (such as twisted pair) are generally better than unbalanced cables only in terms of reducing noise and improving signal quality;
    (C) When the cable length is less than 0.5m, most cables can work effectively. When the distance is between 0.5m and 10m, cat
    3 (Category 3) twisted pair cable is effective, cheap and easy to buy. When the distance is greater than 10m and high speed is required, it is recommended to use cat 5 twisted pair

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